MSE Master of Science in Engineering

The Swiss engineering master's degree


Jedes Modul umfasst 3 ECTS. Sie wählen insgesamt 10 Module/30 ECTS in den folgenden Modulkategorien:

  • ​​​​12-15 ECTS in Technisch-wissenschaftlichen Modulen (TSM)
    TSM-Module vermitteln Ihnen profilspezifische Fachkompetenz und ergänzen die dezentralen Vertiefungsmodule.
  • 9-12 ECTS in Erweiterten theoretischen Grundlagen (FTP)
    FTP-Module behandeln theoretische Grundlagen wie die höhere Mathematik, Physik, Informationstheorie, Chemie usw. Sie erweitern Ihre abstrakte, wissenschaftliche Tiefe und tragen dazu bei, den für die Innovation wichtigen Bogen zwischen Abstraktion und Anwendung spannen zu können.
  • 6-9 ECTS in Kontextmodulen (CM)
    CM-Module vermitteln Ihnen Zusatzkompetenzen aus Bereichen wie Technologiemanagement, Betriebswirtschaft, Kommunikation, Projektmanagement, Patentrecht, Vertragsrecht usw.

In der Modulbeschreibung (siehe: Herunterladen der vollständigen Modulbeschreibung) finden Sie die kompletten Sprachangaben je Modul, unterteilt in die folgenden Kategorien:

  • Unterricht
  • Dokumentation
  • Prüfung
Design of Embedded Hardware and Firmware (TSM_EmbHardw)

This module introduces the student to advanced concepts in modern embedded systems engineering. The module is divided into two sections. The first section is practical/theoretical and is designed to get the student familiar with implementing System on Chip (SoC) designs. The second part discusses formal Hardware/Software Co-Design including design and implementation of advanced embedded architectures as well as the verification and test of the resulting system.  

Eintrittskompetenzen

The students have a working knowledge of programming embedded systems in C.
The students have a working knowledge of basic hardware design including VHDL coding

Lernziele

  • The student will know some of the forces driving the design of modern embedded architectures.
  • The student will understand and be able to apply the V-Model and structured HW/SW Co-Design methodologies including strategies for the verification and test of embedded systems.  
  • The student will be able to design and implement complete SoC designs including using soft-core microprocessors and IP cores in an FPGA.
  • The student will be able to apply loop optimisations using both SW techniques and optimised cache in single- and multi-processor architectures.
  • The students will be able to understand and apply pipeline architectures in processors (super-pipelined, superscalar), HW and SW.

 

Modulkategorie

  • Introduction
    • V-Model, specification and test
    • HW-SW Co-Design
  • SoC design, implementation and test
    • FPGA technology, SoC design, soft-core processors, design, implementation and reuse of custom IP cores
    • Bus systems
  • Optimisation Strategies
    • Advanced peripherals, DMA, scheduling
    • Software loop optimisations, custom instructions, co-processors,
    • Memory hierarchy (cache, scratch pad memories ) 
    • Pipeline, multiprocessing
  • Review
    • Exercises and laboratories using an FPGA board

Lehr- und Lernmethoden

Lectures
Accompanied exercises
Self-study

Bibliografie

No mandatory literature

Vollständige Modulbeschreibung herunterladen

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